In the previous installment, we talked about why flip flops are such an important part of digital design. We also looked at some latch circuits. This time, I want to look at some actual flip ...

Power converters are typically designed to protect against undesirable fault scenarios. For example, if too much current is being drawn on the converter output, overcurrent protection may engage. This ...

This paper presents a low power Clock Gating scheme for clock power improvement that reduces power dissipation by deactivating the clock signal to an inactive value (for clock gating cell) when clock ...

Most switching power-supply controllers provide non-latching fault protection. Satisfying a requirement for a latchoff response to a fault often requires the addition of excessive and redundant ...

The JK flip-flop augments the behavior of the SR flip-flop (J = Set, K = Reset) by interpreting the J = K = 1 condition as a “flip” or toggle command. In my previous column, we introduced latches and ...